MOSFET: Hot carrier effects
Hot carrier degradation:
The energetic hot carriers can rupture Si-H bonds that exist at the Si-Si02 interface, creating fast interface states that degrade MOSFET parameters such as transconductance and subthreshold slope, with stress. The results of such hot carrier degradation are shown in Fig. given below., where we see the increase of VT and decrease of slope, and therefore transconductance, with stress. The solution to this problem is to use what is known as a lightly doped drain (LDD).
As discussed in more detail, by reducing the doping concentration in the source/drain, the depletion width at the reverse-biased drainchannel junction is and the electric field is reduced.
Hot carrier effects are less problematic for holes in p-channel MOSFETs than for electrons in n-channel devices for two reasons. The channel mobility of holes is approximately half that of electrons; hence, for the same electric field, there are fewer hot holes than hot electrons. Unfortunately, the lower hole mobility is also responsible for lower drive currents in p-channel than in n-channel. Also, the barrier for hole injection in the valence band betw
een Si and Si02 is higher (5 eV) than for electrons in the conduction band (3.1 eV).
- One "signature" for hot electron effects is substrate current as shown in fig.
- As the electrons travel towards the drain and become hot, they can create secondary electron-hole pairs by impact ionization.
- The secondary electrons are collected at the drain, and cause the drain current in saturation to increase with drain bias at high voltages, thereby leading to a decrease of the output impedance.
- The secondary holes are collected at the substrate as substrate current. This current can create circuit problems such as noise or latchup in CMOS circuits. It can also be used as a monitor for hot electron effects
- As shown in Fig. 6-43, substrate current initially increases with gate bias (for a fixed, high drain bias), goes through a peak and then decreases.
- The reason for this behavior is that initially, as the gate bias increases, the drain current increases and thereby provides more primary carriers into the pinch-off region for impact ionization.
However, for even higher gate bias, the MOSFET goes from the saturation region into the linear region
when the fixed VD drops below VD(sat.) = (VG — Vr).
- The longitudinal electric field in the pinch-off region drops, thereby reducing the impact ionization rates. Hot electron reliability studies are done under "worst case" conditions of peak substrate current.
These are generally done under accelerated conditions of higher-than-normal operating voltages so that if there are any potential problems, they show up in a reasonable time period. The degradation data is then extrapolated to the actual operating conditions.