## Calculation of Delay Times

The simplest approach for calculating the propagation delay times and is based on estimating the average capacitance current during charge down and charge up, respectively. If the capacitance current during an output transition is approximated by a constant average current' the delay times are found as

....(1)

..(2)

Note that the average current during high-to-low transition can be calculated by using the current values at the beginning and the end of the transition.

..(3)

Similarly, the average capacitance current during low-to-high transition is

..(4)

While the average-current method is relatively simple and requires minimal calculation, it neglects the variations of the capacitance current between the beginning and end points of the transition. Therefore, we do not expect the average-current method to provide a very accurate estimate of the delay times. Still, this approach can provide rough, first-order estimates of the charge-up and charge-down delay times.

The propagation delay times can be found more accurately by solving the state equation of the output node in the time domain. The differential equation associated with the output node is given below. Note that the capacitance current is also a function of the output voltage.

..(5)

First, we consider the rising-input case for a CMOS inverter. Initially, the output Voltage is assumed to be equal to V_{OH}. When the input voltage switches from low (V_{OL}) to high (V_{OH}), the nMOS transistor is turned on and it starts to discharge the load capacitance. At the same time, the pMOS transistor is switched off; thus

..(6)

The circuit can now be reduced to a single nMOS transistor and a capacitor, as shown in Fig. 1. The differential equation describing the discharge event is then

..(7)

Note that in other types of inverter circuits, such as the resistive-load inverter or the depletion-load inverter, the load device continues to conduct a non-zero current when the input is switched from low to high. However, the load current is usually negligible in comparison to the driver current. Therefore, (7) can be used to calculate the chargedown time not only in CMOS inverters, but also in almost all common types of inverter circuits.

**Figure 1 : Equivalent circuit of the CMOS inverter during high-to-low output transition.**