General Structure of Voltage Source Inverters
General structure of Voltage Source Inverters:
Fig: Topology of 1- phase and 3-Phase VSI
- These topologies require only a single dc source and for medium output power applications the preferred devices are n-channel IGBTs. ‘Edc’ is the input dc supply and a large dc link capacitor (Cdc) is put across the supply terminals.
- Capacitors and switches are connected to dc bus using short leads to minimize the stray inductance between the capacitor and the inverter switches.
- The physical layout of positive and negative bus lines is also important to limit stray inductances. Q1, Q2, Q3 etc. are fast and controllable switches. D1, D2, D3 etc. are fast recovery diodes connected in anti-parallel with the switches. ‘A’, ‘B’ and ‘C’ are output terminals of the inverter that get connected to the ac load. A three-phase inverter has three load-phase terminals whereas a single-phase inverter has only one pair of load terminals.
- The current supplied by the dc bus to the inverter switches is referred as dc link current and has been shown as ‘idc’. The magnitude of dc link current often changes in step (and sometimes its direction also changes) as the inverter switches are turned on and off. The step change in instantaneous dc link current occurs even if the ac load at the inverter output is drawing steady power.
- However, average magnitude of the dc link current remains positive if net power-flow is from dc bus to ac load. The net power-flow direction reverses if the ac load connected to the inverter is regenerating. Under regeneration, the mean magnitude of dc link current is negative.
- For an ideal input (dc) supply, with no series impedance, the dc link capacitor does not have any role. However a practical voltage supply may have considerable amount of output impedance. The supply line impedance, if not bypassed by a sufficiently large dc link capacitor, may cause considerable voltage spike at the dc bus during inverter operation.
- This may result in deterioration of output voltage quality, it may also cause malfunction of the inverter switches as the bus voltage appears across the non-conducting switches of the inverter. In the absence of dc link capacitor, the series inductance of the supply line will prevent quick build up or fall of current through it and the circuit behaves differently from the ideal VSI where the dc voltage supply is supposed to allow rise and fall in current as per the demand of the inverter circuit.
- The dc link capacitor should be put very close to the switches so that it provides a low impedance path to the high frequency component of the switch currents. The capacitor itself must be of good quality with very low equivalent series resistor (ESR) and equivalent series inductor (ESL). The length of leads that interconnect switches and diodes to the dc bus must also be minimum to avoid insertion of significant amount of stray inductances in the circuit.
- The overall layout of the power circuit has a significant effect over the performance of the inverter circuit. Thus the single phase ‘full-bridge’ (often, simply called as ‘bridge’) circuit has two legs of switches, each leg consisting of an upper switch and a lower switch.
- Junction point of the upper and lower switches is the output point of that particular leg. Voltage between output point of legs and the mid-potential of the dc bus is called as ‘pole voltage’ referred to the mid potential of the dc bus. One may think of pole voltage referred to negative bus or referred to positive bus too but unless otherwise mentioned pole voltages are assumed to be referred to the mid-potential of the dc bus.
- The two pole voltages of the single-phase bridge inverter generally have same magnitude and frequency but their phases are 1800 apart. Thus the load connected between these two pole outputs (between points ‘A’ and ‘B’) will have a voltage equal to twice the magnitude of the individual pole voltage. The pole voltages of the 3-phase inverter bridge, are phase apart by 1200 each.