Subject : Power Electronics
Unit : DC to AC Converters
Load-Commutated CSI
Load commutated CSI:
Fig: Load Commutated CSI Fig: Voltage and current waveforms.
- The capacitor, C is assumed to be in parallel with resistive load (R). The capacitor, C is used for storing the charge, or voltage, to be used to force-commutate the conducting thyristor pair as will be shown. A constant current source, or a voltage source with large inductance, is used as the input to the circuit.
- The power switching devices used here is the same, i.e. four thyristors only in a full- bridge configuration. The positive direction for load current and voltage.
- Before t = 0, the capacitor voltage is V_{c} = -V_{1} , i.e. the capacitor has left plate negative and right plate positive. At that time, the thyristor pair, Th_{2 }& Th_{4 }was conducting. When (at t = 0), the thyristor pair, Th_{1 }& Th_{3 }is triggered by the pulses fed at the gates, the conducting thyristor pair, Th_{2 }& Th_{4 }is reverse biased by the capacitor voltage V_{C} =-V_{1}, and turns off immediately.
- The current path is through Th_{1}, load (parallel combination of R & C), Th_{3}, and the source. The current in the thyristors is i_{Th1} = i_{Th3} = I , the output current is I_{ac} = I; the capacitor voltage, V_{c} changes from –V_{1} to V_{1} as the capacitor gets charged by the current during the time,(T/2) > t > 0 .
- The load voltage is v_{0} = v_{c} . Thus, the waveform of the current, i_{0} = (V_{0}/R) = (V_{C}/R) through load resistance, R. Similarly, when (at t = T/2 ), the thyristor pair, Th_{2 }& Th_{4 }is triggered by the pulses fed at the gates, the conducting thyristor pair, Th_{1 }& Th_{3 }is reverse biased by the capacitor voltage V_{c} = V_{1}, and turns off immediately.
- The current path is through Th_{2}, load (parallel combination of R & C), Th_{4}, and the source. The current in the thyristors is i_{Th2} =i_{Th4} = I , but the output current is I_{ac} = -I ; the capacitor voltage, v_{c} changes from V_{1} to –V_{1} , as the capacitor gets charged by the current i_{c} during the time, T > t > (T/2).
- At t = 0, the capacitor voltage is v_{c} = -V_{1}, then v_{0} = v_{c} = -V_{1} , and the load current through R is . During the time, the capacitor gets charged, with its voltage changing from –V_{1} to V_{1} .
- So, At t = T/2, the load current is .The input voltage is v_{in }= v_{0}, during (T/2) > t > 0, and v_{in} = -v_{0}, during (T/2) > t > 0, and v_{in} = -v_{0}, during T > t > (T/2).
- It may be observed that, when the thyristor pair, Th_{1 }& Th_{3 }is conducting for (T/2) > t > 0 , the currents are leaving node A, and the current, I is entering node A. The current in node A, is i_{c} i_{0} = I or, i_{c} = I – i_{0}. At t = 0,i_{0} = -I_{1} and i_{c} = I I_{1} . Just after (T/2), when the thyristor pair, Th_{2 }& Th_{4 }is conducting, the currents are entering node B (Fig. 40.1), and so also the current, I. The current in node B is i_{c} i_{0} I = 0 or, i_{c} = -( i_{0} I) . At t = (T/2),i_{0} = I_{1} , and i_{c} = -(I I_{1}) . The cycle repeats itself.