Hi Fellow FaaDoOs.. FaaDoOEngineers is pleased to present its FaaDoO users with some very exclusive and awesome projects, seminar & presentation ALL FREE OF COST, NO HIDDEN TERMS & CONDITIONS!!

For the First time in India we bring for our users final year projects branchwise.

This is the thread for Index of Electronics engineering major & minor projects download students, Simply click on the project name to download the project. These Projects and seminars are very comprehensive and believe me if you each of them thoroughly then you will definitely get a FaaDoO Rank in ur exams!!

1. Character Recognition Using Matlab
2. Carnot cycle - Best Explanation Ever!
3. Automotive railway gate control
4. Surface Plasmon Resonance
5. Project report on transmitters
7. Project on multilevel converter
8. Poll: 100 GbE database interconnect
9. Mobile car stereo player
10. Project report of ntpc
11. Pc based advanced automatic car parking
12. Bsnl training Documentry
13. Mpeg and h-scalable video coding Seminat ppt
14. multiplexer based array multipliers
15. line tracers
16. Metal-Semiconductor Junctions or MS diode concepts
17. 4G Wireless Systems
18. Metal-Semiconductor Junctions
19. Circuit design with VHDL | VLSI Design
20. gps using accelerometr
22. Tranning report on all india radio
23. Design and Implementation of MPC107 on FPGA
24. video compression using h.264/AVC

i need informatio about subscriber identity module

i need information on embedded system basics

Can u plz send detaild information about multiplexer based array multipliers.........

Abstract of Multiplexer based array Multipliers:

"A new algorithm for the multiplication of two n-bit numbers based on the synchronous computation of the partial sums of the two operands is presented. The proposed algorithm permits an efficient realization of the parallel multiplication using iterative arrays. At the same time, it permits high-speed operation. Multiplier arrays for positive numbers and numbers in two's complement form based on the proposed technique are implemented. Also, an efficient pipeline form of the proposed multiplication scheme is introduced. All multipliers obtained have low circuit complexity permitting high-speed operation and the interconnections of the cells are regular, well-suited for VLSI realization."

i am libin.. an ME design student