Login to Your Account
Results 1 to 3 of 3

Thread: Digital Design Through Verilog Ebook, notes and presentations covering full semester syllabus

Popular topic for study

The Magnetron Oscillator

The primary tube oscillator for radar is the magnetron .Oscillator devices are typically used in lower-cost and hence generally lower-performance applications. These devices are easier to fabricate, are built around less expensive components, and are therefore cheaper than their stable amplifier counterparts. The following section explains the operation of Magnetron Read this topic
  1. #1
    FaaDoO-Administrator FaaDoO-Engineer's Avatar
    Join Date
    Oct 2010
    Blog Entries

    Gender: : Male

    Branch: : Computer Science Engineering

    City : Noida

    Zip 32 Digital Design Through Verilog Ebook, notes and presentations covering full semester syllabus

    The topics covered in the attachments are:

    UNIT I - INTRODUCTION TO VERILOG : Verilog as HDL, Levels of Design Description, Concurrency, Simulation and Synthesis, Functional Verification, System Tasks, Programming Language Interface (PLI), Module, Simulation and Synthesis Tools, Test Benches.

    LANGUAGE CONSTRUCTS AND CONVENTIONS : Introduction, Keywords, Identifiers, White Space Characters, Comments, Numbers, Strings, Logic Values, Strengths, Data Types, Scalars and Vectors, Parameters, Memory, Operators, System Tasks, Exercises.

    UNIT II - GATE LEVEL MODELING : Introduction, AND Gate Primitive, Module Structure, Other Gate Primitives, Illustrative Examples, Tri-State Gates, Array of Instances of Primitives, Additional Examples, Design of Flip-flops with Gate Primitives, Delays, Strengths and Contention Resolution, Net Types, Design of Basic Circuits, Exercises.

    UNIT III - BEHAVIORAL MODELING : Introduction, Operations and Assignments, Functional Bifurcation, Initial Construct, Always Construct, Examples, Assignments with Delays, Wait construct, Multiple Always Blocks, Designs at Behavioral Level, Blocking and Non blocking Assignments, The case statement, Simulation Flow. i and i-else constructs, assign-deassign construct, repeat construct, for loop, the disable construct, while loop, forever loop, parallel blocks, force-release construct, Event.

    Introduction, Continuous Assignment Structures, Delays and Continuous Assignments, Assignment to Vectors, Operators.

    SWITCH LEVEL MODELING: Introduction, Basic Transistor Switches, CMOS Switch, Bi-directional Gates, Time Delays with Switch Primitives, Instantiations with Strengths and Delays, Strength Contention with Trireg Nets, Exercises.

    UNIT V - SYSTEM TASKS, FUNCTIONS, AND COMPILER DIRECTIVES : Introduction, Parameters, Path Delays, Module Parameters, System Tasks and Functions, File-Based Tasks and Functions, Compiler Directives, Hierarchical Access, General Observations, Exercises,

    FUNCTIONS, TASKS, AND USER-DEFINED PRIMITIVES : Introduction, Function, Tasks, User- Defined Primitives (UDP), FSM Design (Moore and Mealy Machines)

    State Machine Charts, Derivation of SM Charts, Realization of SM Charts, Implementation of the Dice Game, Alternative realizations for SM Charts using Microprogramming, Linked State Machines.

    UNIT VII - DESIGNING WITH PROGRAMMABLE GATE ARRAYS AND COMPLEX PROGRAMMABLE LOGIC DEVICES : Xilinx 3000 Series FPGAs, Designing with FPGAs, Using a One-Hot State Assignment, Altera Complex Programmable Logic Devices (CPLDs), Altera FLEX 10K Series CPLDs.

    UNIT VIII - VERILOG MODELS : Static RAM Memory, A simplified 486 Bus Model, Interfacing Memory to a Microprocessor Bus, UART Design, Design of Microcontroller CPU.

    Attached Files for Direct Download
      File Name:
      File Size:
      732.9 KB
      Total Downloads:
    * Click on the 'file icon' or 'file name' to start downloading

  2. #2
    Fuchcha FaaDoO Engineer
    Join Date
    Jun 2012

    Gender: : Female

    Branch: : Electronics Engineering

    City : Kanpur

    Re: Digital Design Through Verilog Ebook, notes and presentations covering full semes

    thnx can u plz upload the ebook of few programs using verilog as soon as possible...........????

  3. #3
    Fuchcha FaaDoO Engineer
    Join Date
    Nov 2015

    Branch: : Electronics Engineering

    Re: Digital Design Through Verilog Ebook, notes and presentations covering full semester syllabus

    thanks.It helped a lot in my preparation for end semester exam.
    I could not find the state machine notes.
    It would be appreciated if you post the notes for the same