The Tiger SHARC processor is the newest and most power member of this family which incorporates many mechanisms like SIMD, VLIW and short vector memory access in a single processor. This is the first time that all these have been combined in a real time processor.

The TigerSHARC DSP is an ultra high performance static superscalar architecture that optimized for tele-communications infrastructure and other computationally demanding applications.

The unique architecture combines elements of RISC, VLIW and standard DSP processors to provide native support for 8, 16,and 32-bit fixed, as well as floating point data types on single chip. Large on-chip memory, extremely high internal and external bandwidths and dual compute blocks provide the necessary capabilities to handle a vast array of computationally demanding, large signal processing tasks.



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