VLSI Design Paper Presentation & Seminar

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We present the RF transmitter architecture based on All Dig ital Phase Locked Loop (ADPLL) which is built from the ground up using digital techniques and digital creation flow. In this paper, we described a system on chip that integrates ADSP with a
multi Gega-Hertz digital RF transmitter that meets the blue tooth specifications. A need has arisen to find digital architectural solutions to the RF functions. The frequency synthesizer is a key block used for frequency translation of radio signals and has been traditionally based on a charge -pump phase-locked loop (PLL), which is not easily amenable to integration. Recently, a digitally -controlled oscillator (DCO), which deliberately avoids any analog tuning controls, was first presented for RF wireless

This allows for its loop control circuitry to be impl emented in a fully digital manner as first proposed. Normally VCO forms a major part in conventional analog PLLs. Due to its entire digital architecture ADPLL consists of a DCO. Here the DCO
functions on the basis of Shifting. This DCO shifting along with FCW comprises the basic operation of ADPLL. The challenge of the above ADPLL-based transmitter is to find an architecture that is amenable to low current consumption such that it is
competitive to similar products using the conventional RF techniques.

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