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CMOS Nyquist-rate analog-to-digital converters (ADCs) in modern electronic systems tend to fall in two broad categories: those that operate at very high sampling rates, up to several gigahertz, with resolution in the range of 4–8 b, and those that perform conversions at rates of tens of megahertz while providing resolution in the range of 10–15 b. The very high-speed low-resolution converters find use primarily in applications such as instrumentation, wideband communications, and data retrieval from magnetic storage media. Power consumption is rarely a primary concern in these applications, and the principal challenge is to achieve a high sampling rate for resolutions that can be readily achieved within the matching limitations of CMOS technologies.
The ADC introduced in this work targets performance between the two categories noted above, namely, a sampling rate of 150 MSample/s and a resolution of 8 bits. These specifications are typically appropriate for high-speed wireline and wireless communications.
The attachment to download the report on CMOS Time Interleaved ADC is provided below
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Last edited by surangma Parashar; 16th November 2011 at 02:17 PM.