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About the Book:
Cimos Logic Circuit Design Textbook by John P Uyemura is based on the book written by Kluwer Circuit design for CMOS/VLSI published in 1992. As per the author, the book is the updates of the previous version by Kluwer based on modern digital circuit design although which have not changed much in the previous few years. Great majority of the old files were abandoned and replaced with expanded discussions and new topics, and the book was reorganized to the form described material.
Content of the Book:
There are mainly 10 chapters on this book and it is further subdivided into many important sub-topics. The title of the chapter are as follows:
Introduces the MOS system and uses the gradual-channel approximation to derive the square-law equations and basic FET models. This sets the notation for the rest of the book. Bulkcharge models are also discussed, and the last part of the chapter introduces topics from small device theory, such as scaling and hot electrons.
An overview of silicon fabrication and topics relevant to a CMOS process flow. Basic ideas in lithography and pattern transfer are covered, as are items such as design rules, FET sizing, isolation, and latch-up. This chapter can be skipped in a first reading, but it is important to understanding some problems that are specific to layout and fabrication issues. It is not meant to replace a dedicated course in the subject.
Detailed analysis of the static CMOS inverter. The study is used to set the stage for all of the remaining chapters by defining important DC quantities, transient times, and introducing CMOS circuit analysis techniques.
detailed study of the electrical characteristics of FETs when used as voltage-controlled electronic switches. In particular, the treatment is structured to emphasize the strong and weak points of nFETs and pFETs, and how both are used to create logic networks.
Static logic gates. This includes fully complementary designs in addition to variants such as pseudo-nMOS circuits and novel XOR/XNOR networks.
Transmission gate logic completes this part of the book.
This chapter includes topics such as charge sharing and charge leakage in various types of CMOS circuit arrangements. RC modelling is introduced, and the Elmore formulas for the time constant of an RC ladder is derived. Clocks are introduced and used in various types of clocked static and dynamic circuits.
The discussion includes detailed treatments of precharge/evaluate ripple logic, domino logic cascades, self-resetting logic gates, single-phase circuits and others. I have tried to present the material in an order that demonstrates how the techniques were developed to solve specific problems.
Differential dual-rail logic families such as CVSL and CPL with short overviews of related design styles.
Selected topics in chip design, such as interconnect modelling and delays, crosstalk, BSD-protected input circuits, and the effects of transmission lines on output drivers. The level of the presentation in this chapter is reasonably high, but the topics are complex enough so that the discussions only graze the surface. It would take another volume (at least) to do justice to these problems. As such, the chapter was included to serve as an introduction for other courses or readings.
Last edited by jaivinder; 11th August 2015 at 10:35 AM.